💡 Passionate about building innovative solutions at the intersection of software & hardware
🎓 Currently exploring System Software and Computer Architecture
Designed and implemented MMSE signal detection and channel estimation in Verilog for MIMO Wi-Fi baseband, targeting low latency, high accuracy decoding.
Developed and verified FPGA baseband DSP blocks (timing sync, FFT/IFFT, OFDM demodulation, spatial multiplexing) with SystemVerilog testbench, ensuring functional correctness and real-time throughput.
Debugged RTL using simulation and assertions; resolved critical synthesis timing violations to achieve timing closure. Synthesized and floor planned the baseband RTL for integration into a custom ASIC SoC, refining timing constraints, optimizing critical paths, and validating logic interoperability between digital baseband and RF interface modules.
Led the design of RGB, a piano-training platform combining real-time key recognition with LED feedback for progressive learning.
Spearheaded fullstack hardware/software co-design, integrating embedded C++ control logic with microcontroller-based sensor and LED drivers.
Built a dynamic C++ automation pipeline that parses MIDI files, extracts timing data, and drives playback synchronization for visualization.
Facilitated lab sessions and provided design reviews for ECE 203 (Digital Logic Design, FSMs, Assembly) and ECE 358 (Parallel Computing: Shared/Distributed Memory Architectures, OpenMP, MPI, Parallel Algorithms).
Advised students on debugging RTL, synchronization issues, and parallel performance bottlenecks across C++ and Verilog implementations.
Supported instruction of 100+ students weekly through office hours and lab supervision, emphasizing modular, timing aware hardware design practices.
Enjoy one of my favorite piano pieces as you explore 😊
This beautiful composition perfectly captures the balance between technical precision and creative expression that I strive for in my engineering work.
"In programming as in music, elegance is not optional" — Richard O'Keefe
Wrote 2000+ lines of code in ARMv7 assembly to design an interactive tom and jerry chasing game
Interacted with Memory Mapped I/O devices and implemented double buffering to avoid screen flickering
Manually initialized memory in the data section including sprite array structs and handwritten pixmaps
Developed responsive website for the Ethiopian Medical Students Association at St. Paul
Worked closely with student leader to gather requirements and iteratively design a site that reflects the organization’s mission
Implemented dynamic navigation, announcements, and promotional sections to support organizational outreach and engagement
A C++ application to parse and visualize campus map data, displaying building locations and nearby bus stops utilizing XML and threaded binary search tree
Integrated the Chicago Transit Authority’s Bus Tracker API with cURL to fetch real-time bus arrival predictions
Designed efficient geospatial algorithms to compute and display the closest bus stops to campus buildings
Developed a Python language interpreter in C, creating an execution environment using token-based processing.
Designed and verified a 5-stage pipelined RISC-V CPU with hazard detection, forwarding, and branch prediction.
Synthesized the execution unit using Cadence Genus, achieving 800 MHz at 20,200 µm² core area.
Extended the design into an FPGA-hosted SoC, integrating UART, GPIO, timer, and memory interfaces with a bare-metal toolchain.
Designed a real-time two player tank game in VHDL with VGA rendering, PS/2 keyboard control, and LCD output.
Implemented autonomous tank motion, selectable speed control, single shot bullet logic, and collision detection using synchronous FSM.
Used Block RAM for color palette ROM and built pixel level VGA drawing logic with proper timing and scanline generation.
Verified movement, bullet, and scoring logic through ModelSim waveforms and synthesized in Quartus for on board deployment.
Developed a 4x4 SRAM bank with 6T SRAM cells, a clocked sense amplifier, bitline conditioning, and write circuitry.
Schematic and layout completed in Cadence Virtuoso, with the design passing DRC and LVS checks 100% successfully.
Employed an 64x32 LED matrix audio spectrum visualizer using an analog microphone and microcontroller.
Wrote 200+ lines of Arduino code, integrating MOSFETs and RC filters for precise audio response.
Implemented Fast Fourier Transform (FFT) to dynamically adjust spectrum display based on sound pitch.
Led the development of RGB, a scaled real size Piano Instructor, integrating real time data processing and LED-guided feedback.
Hardware-software integration of MIDI files with LED, ensuring seamless note recognition and playback assistance.
Automation pipeline using C++ that fetches raw MIDI file, processes note data using a custom extractor, and processes user input for real-time simulation and progress tracking.
Prototyped a smart weight scale with wireless display and vibration feedback for patients with lower extremity injuries during physiotherapy.
Integrated weight-bearing calculation functionality to provide real-time data for rehabilitation tracking.
Meta
Jan 2024 – Feb 2024
IBM
April 2025
The Linux Foundation
March 2025 - Now
Feel free to reach out for collaborations or just a friendly chat!
